This page contains a list of errata in the textbook. Any changes to the accompanying code are available by downloading the current version. Please report any mistakes not listed here to the authors (reese AT ece DOT msstate DOT edu, bjones AT ece DOT msstate DOT edu, jwbruce AT ece DOT msstate DOT edu).

Errors (Technical)

• Chapter 2, pg. 39, Figure 2.3, Clock cycle 7 is labeled with state Z3, replace with Z4.
  
• Chapter 3, pg. 61, Figure 3.4. Replace the last address on the right-hand column ("0x0006") with "0x000A".
• Chapter 3, pg. 65, Figure 3.7. Replace "mov Wn, f" with "mov Wns, f" (it only supports register direct addressing).
• Chapter 3, pg. 74, Figure 3.17b, In right hand W0 register, replace 0x1A23 with 0x1AF3.
  
• Chapter 4, pg. 102: Replace the sentences "The rrnc (rotate right without carry) instruction rotates the bits one position to the right, with the most significant bit rotating to the least significant bit position. The rlnc (rotate left without carry) instruction rotates the bits one position to the left, with the least significant bit rotating to the most significant bit position." with "The rrnc (rotate right without carry) instruction rotates the bits one position to the right, with the least significant bit rotating to the most significant bit position. The rlnc (rotate left without carry) instruction rotates the bits one position to the left, with the most significant bit rotating to the least significant bit position."
• Chapter 4, pg. 126, problem 38. Replace "(uint8) u8_q)" with "(uint16) u8_q)"
• Chapter 5, pg. 149, Figure 5.24. Replace asrl with asr in the explanation under item (b).
  
• Chapter 6, pg. 164, Figure 6.4. Replace last line of assembly "mov u16_k" with "mov W0, u16_k".
• Chapter 6, pg. 183, 4th line from bottom, replace "...decrementing the stack pointer by 2..." with "......decrementing the stack pointer by 4...".
• Chapter 6, pg. 191, Figure 6.26. Insert the lines "ze W1, W1" and "ze W2, W2" between the lines "swapU32:" and "sl W1, #2, W1".
• Chapter 6, pg. 205, problem 33. Replace "for the subroutine of problem 26." with "for the subroutine of problem 28."
• Chapter 6, pg. 205, problem 35. Replace "Implement the subroutine of problem 26..." with "Implement the subroutine of problem 28...".
• Chapter 7, pg. 220, last sentence. Replace “+7.10375 to -8.0” with “+7.9375 to -8.0”.
• Chapter 8, pg. 254, bullet #11. Replace "T1CLK" with "T1CK"
• Chapter 9, pg 322, Figure 9.3, Vector 17: replace "_SP1ErrInterrupt" with "_SPI1ErrInterrupt". Vector 18: replace "_SP1Interrupt" with "_SPI1Interrupt".
• Chapter 9, pg. 333, Figure  9.10:  Replace “FOSC = 4 MHz” with “FCY = 4 MHz”.
• Chapter 9, pg. 364, Figure 9.31. There should only be ONE switch (SW0) in this figure, connected to both INT0 and INT1. This way, the edge generated by the switch is seen simultaneously by both inputs.
• Chapter 10, pg. 382, text and Figure 10(b): Change "7.3728 kHz" to "7.3728 MHz". Likewise, change "36.864 kHz" to "36.864 MHz".
• Chapter 10, pg. 410, Figure 10.36b: Add "CONFIG_RP3_AS_DIG_PIN();" to the slave SPI configuration function. Pin RP3 on the PIC24HJ32GP202 is an analog pin, and the analog functionality must be disabled since RP3 is being used as the SPI Slave Select input.
• Chapter 11, pg 464, Figure 11.13: There must be at least a 1 instruction cycle delay between setting the ADC sample bit and checking the ADC DONE bit, as setting the sample bit clears the DONE bit. A "__delay32(1)" library call should be inserted between "SET_SAMP_BIT_ADC1()" and "WAIT_UNTIL_CONVERSION_COMPLETE_ADC1()". Without this change, the function returns the value of the previous conversion as the check for the DONE flag is done immediately after setting the sample bit. The library code archive has been updated with this change.
• Chapter 15, pg 671, Figure 15.2. The '+' terminal of the LM386 should be connected to the wiper of the 10 kohm potentiometer if the pot is used.
• Appendix G, pg 795, Problem 1. The machine code for location 0 should be "01 0110".
• Appendix G, pg 797, problem 9. Replace "mov.w #0x12F0,W2" with "mov.w 0x12F0,W2"  (drop the #, this is not an immediate move).
• Appendix G, pg 811, line1. Replace "(int *) pu8_1;" with "(uint16 *) pu8_1;"
• Appendix G, pg 818, problem 3. The clock frequency should be 20 MHz, not 40 MHz. The solution should read "2³² ticks × 1/20 MHz × 8 = 4294967296 × 1/20 MHz × 8 = 1718 s."
• Appendix A, Figure A.4, pg 713. Replace "ASR.{B} Wb, Wns, Wnd" with "ASR Wb, Wns, Wnd" (it does not have a byte version).
• Appendix A, Figure A.4, pg 713. Replace "ASR.{B} Wb, #lit4, Wnd" with "ASR Wb, Wns, Wnd" (it does not have a byte version).
• Appendix A, Figure A.4, pg 713. Replace the "AND.{B} Wb, #lit5, Wd" instruction encoding of "0100 0www wBqq qddd d11k kkkk" with "0110 0www wBqq qddd d11k kkkk".
  
• Appendix A, Figure A.4, pg 715. Replace "CLR{.B} Ws" with "CLR{.B} Wd" (this is a destination register).
  
• Appendix A, Figure A.4, pg 716. Replace "MOV Wn,f" with "MOV Wns,f" (it only supports register direct addressing).
  
• Appendix A, Figure A.4, pg 717. Replace "MOV f,Wn" with "MOV f,Wnd" (it only supports register direct addressing).
• Appendix A, Figure A.4, pg 717, Replace "Wsn" with "Wns" on the PUSH.D line, for 3 replacements.
  
• Appendix A, Figure A.10, pg 719, Replace "SL.{B} Wb, Wns, Wnd" with "SL Wb, Wns, Wnd" (it does not have a byte version).
• Appendix A, Figure A.10, pg 719, Replace "SL.{B} Wb, #lit4, Wnd" with "SL Wb, Wns, Wnd" (it does not have a byte version).
• Appendix A, Figure A.11, pg 720, Replace "XOR" with "XOR.{B}" for all XOR instruction forms (they all have byte versions).
• Appendix D, Figure D.4, pg 772, Replace "ENABLE_Rxy_AS_PULLUP()/ "DISABLE_Rxy_AS_PULLUP()/" with "ENABLE_Rxy_PULLUP/DISABLE_Rxy_PULLUP".
• Appendix G, pg. 797, Chapter 3, problem 13. Change line 3 from "sub.b j, WREG    ; WREG = WREG - j = (i - 32) - j)" to "subr.b j, WREG    ; WREG = WREG - j = (i - 32) - j)".
• Appendix G, pg. 803, Chapter 6, problem 27. Line 3: replace "cp0 [W0]" with "cp0.b [W0]",  line 6: Replace "mov [W0],[W1] " with "mov [W1],[W0]".
• Appendix G, pg. 804, Chapter 6, problem 35. Insert the lines "sl W1, W1" then "sl W2, W2" between the lines "ze W2, W2" and "add W0, W1, W3".

Errors (Grammar, Formatting, others)

• Chapter 6, pg. 180, 1st paragraph, line 9: Replace "Listing 3.3" with "Listing 3.4"
• Chapter 6, pg. 188, Figure 6.23, assembly language: Replace "bra GEU,end_loop   ;exit loop if u8_i>=1" with "bra GEU,end_loop   ;exit loop if u8_i>=16".
  
• Chapter 8, pg. 257, 2nd paragraph, line 9:  Replace “The TD TT-232R-3.3” with “The FTDI TTL-232R-3.3”
• Chapter 8, pg. 262, Figure 8.6: The outstring() function is in common\pic24_serial.c, not common\pic24_uart1.c.
• Chapter 8, pg. 269, Figure 8.10. The doze postscaler option should be "... clock modes except HS, XT".
• Chapter 8, pg. 282, 5th paragraph, line 1: Replace "Figure 8.9" with "Figure 8.10"
• Chapter 8, pg. 284, 2nd paragraph, line 7. Replace “process or” with “processor”  (extra space is removed)
• Chapter 9, pg. 344, first paragraph, line 4. Replace “Figure 8.29” with Figure 8.30”.
• Chapter 10, pg 381, 1st paragraph: "The FERR bit (framing error status) is set to a “1” is the stop bit..." should be "The FERR bit (framing error status) is set to a “1” if the stop bit..."
• Chapter 14, pg. 619, 2nd paragraph, line 9: "until the both tasks", delete the.
• Chapter 14, pg. 621, 2nd paragraph, line 5: Replace wait(-then-signal) with wait()-then-signal() .
• Chapter 14, pg. 630, 2nd paragraph, line 1: Replace "in Figure 14.10). The" with "in Figure 14.10, the".
• Chapter 14, pg. 636, caption of Figure 14.14: Replace "datatypes" with "data types"
• Chapter 14, pg. 652, Figure 14.26: Replace "if the interrupt is needs servicing", delete is.
• Chapter 14, pg. 656, 1st paragraph, line 9: Replace "1²C" with "I²C".
• Appendix B, pg. 730, 3rd paragraph, line 10: Replace "Program button 2 seconds" with "Program button within 2 seconds".
• Appendix G, pg. 793, Chapter 1, problem 1. "25=32, 26=64, " should be "2⁵=32, 2⁶=64, ".
• Appendix G, pg. 795, Chapter 2, problem 1. The label 'START:' should be in front of the 'JC LOC_IS_1' instruction, i.e. "START:  JC LOC_IS_1". The label 'LOC_IS_1:" should be placed in front of the "OUT 1" instruction, i.e., "LOC_IS_1:    OUT 1"

Clarifications

• Chapter  8, Page 290: "Note that a port bit cannot be both an input and an output simultaneously; it is either one or the other based on the setting of the TRISx<y> bit." Actually, a port can always be read (act as an input) regardless of the TRIS bit setting. When the TRIS bit is 0 (tristate buffer is enabled, port pin is being driven, so the port is configured as an output), reading the Rx<y> bit returns what is driven on the port pin (See Figure 8.23).
• Chapter 9, Page 330, Figure 9.8, Change notification interrupts. This diagram is the change notification system of the PIC24H Family. The PIC24F family has the additional feature of a programmable pulldown; the bit names are CN0PDE<x>. See  Section 12.6 of the PIC24F Family Reference Manual.
• Chapter 10, pg. 427, Figure 10.54: The diagram shows a logical view of the 24LC515 serial EEPROM, but does not reflect the physical pinout. Refer to the data sheet for this device for the pinout.
• Chapter 11 - The examples in  Figures 11.17, 11.19, and 11.21 that make use of more than one ADC buffer ADCxBUFy are intended for PIC24 CPUs without DMA such as the PIC24HJ32GP202. For PIC24 CPUs with DMA (such as the PIC24HJ64GP502), buffers past ADCxBUF0 do not exist; instead, DMA must be used for buffering. Some examples on using the ADC with DMA have been added to the "chap11/" folder of the code archive. Chapter 13 discusses general use of the DMA module.
• Chapter 12 - The function named configOutputCapture1 in Figures 12.25, 12.27 and Listing 12.5 should more aptly be named configOutputCompare1 since it configures the output compare module. The code is correct,  but a more appropriate name should have been used.
• Analog pins and remappable pins - when mapping a remappable pin to an external pin, the analog functionality must be disabled for input functions or else the input always returns as '0'. While not strictly necessary, the analog functionality should also be disabled for output functions as this reduces loading on the pin. The analog functionality can be disabled by the CONFIG_RPx_AS_DIG_PIN() macros. In our examples, we did not always do this, but the examples in which we did not explicitly disable the analog functionality work on the PIC24HJ32GP202 because we chose non-analog pins. For example, in our SPI examples in Chapter 10, we used RP5 for the SPI data in function; RP5 is a digital-only pin on the PIC24HJ32GP202. For completeness, we should have included a CONFIG_RP5_AS_DIG_PIN() in order to disable the analog functionality in the case where RP5 is an analog input pin on another PIC24 family member. For a RPx pin without analog functionality, the associated CONFIG_RPx_AS_DIG_PIN() macro is an empty macro, so it does not cost code space to include it.

Reference Problems:

In Chapter 8, some of the references used the section number of the PIC24 Family Reference Manual section number instead of the reference number given in Appendix F.

• Pgs 267, 268: Replace reference “[25]” with “[27]” in four places in this section.
• Pg, 268, third line from bottom. Replace reference “[7]” with “[15]”.
• Pg. 277, First line of third paragraph. Replace reference “[8]” with “[16]”.
• Pg. 280, First line of second paragraph. Replace reference “[9]” with “[17]”.
• Pg. 281, Second line of fifth paragraph. Replace reference “[9]” with “[17]”.
• Pg. 289, Replace reference “[10]” with “[18]”.

Code Updates

The code archive is continually being tweaked, so you may see small differences when comparing Figure code with source code in the archive. The functionality will remain the same however. We strongly encourage you to download the current version of the code archive.

• The Bully Bootloader GUI shipped on the CDROM is version 0.19. If you use this version, please ensure that the checkbox labeled "Enable Config Bits Prgming" is checked when programming. If not checked, configuration bits are programmed anyway, and the current configuration bits may be corrupted.  It is recommended that you update to the current GUI version located in the code archive.
• The MPLAB Project files for the assembly language projects (such as in the folder "chap3/") on the book's CDROM have the wrong search path for the linker scripts as these files were moved in a later version of MPLAB (V8.10 onward).  As such, you will get a linker error after assembly since MPLAB will not be able to find the linker scripts. The online code archive has been updated with project files that have the correct search paths.