FAQ on Microcontrollers: From Assembly Language to C Using the PIC24 Family




Are there Powerpoint slides available?

There are PDF versions of powerpoint slides available for our course at this link. These slides cover Chapers 1-6, 8, 9, 10, 11 (selected topics), 12 (selected topics). The power point files are available by instructor request, as well as the .png files of all book figures.

I am currently using the PIC18 family, and the students like it. Why switch?

We used the PIC18 family in our introductory microprocessors course and follow-on embedded systems course from Fall 04 to Spring 08. We switched to the PIC24 family in Summer 08 for the following reasons.

Assembly Language reasons:
  • The PIC18 family has no signed branches, so signed branches have to be done using simple branches on the V and N flags. While this reinforces how signed branches work, from a pedagogical viewpoint the resulting code is hard for students to follow. The PIC24 family has a complete set of signed and unsigned branch instructions. 
  • The PIC18 banked architecture makes discussion of memory addressing difficult for students to follow. The PIC24 family has a non-banked architecture that allows direct addressing to the first 8K of SRAM, so memory addressing is more straight-forward.
  • The PIC18 family has three registers for indirect addresssing, and one general purpose register (WREG). The PIC24 family has 16 working registers (W0-W15) and any of them can be used for indirect addressing. The PIC24 family also has a richer set of indirect addressing modes than the PIC18 family, making discussion of pointer operations much more straight-forward.
  • The PIC18 family has a limited depth stack that is used for storing return addresses, it does not have a true data stack. The PIC24 family has a true data stack located in SRAM where W15 is the stack pointer, with PUSH/POP for data storage/retrieval. This makes stack discussions more straight forward. The PIC24 family also has link/unlink instructions for stack frame support.
  • The 16-bit architecture makes code for 16/32-bit data types more tractable.
  • The instruction set is richer in general -- more flexible data movement, signed/unsigned multiply/divide support.
  • The Z flag has a 'sticky' behavior when used with the subtract with carry operation that makes extended precision zero and non-zero comparison very straight-forward, instead of the multiple branch approach required in PIC18 code.
  • Here is the Programmers Reference Manual that gives the instruction set for the PIC24H/PIC24F/dsPIC families (the PIC24H/PIC24F instruction set is a subset of the dsPIC instruction set, the only instructions not supported are those for the specialized fixed-point ALU that is included in the dsPIC family).
Hardware Interfacing, C compiler reasons:
  • The PIC24 family has separation of SPI and I2C functions, so you can run SPI and I2C interfaces at the same time.  On the PIC18 family, these functions are controlled by the same peripheral module, so either you can use I2C or SPI, but not both at the same time. Many PIC24 members have multiple asynch serial, SPI, and I2C modules (even the 28 pin family members).
  • Remappable pins that allow internal peripheral ports to be flexibly mapped to external pins. This is a key change, as this allows much better usage of existing pins.
  • All of the timers are 16-bit timers (or two can be configured to act as a 32-bit timer), this simplifies timer discussion.
  • The interrupt vectors are separated to individual addresses like most processors, so you have separate ISRs for each interrupt instead of the single ISR approach used by the PIC18.  
  • The PIC24 family has a 7-level interrupt priority system instead of the high/low priority system of the PIC18 family.
  • The PIC24 family also has a separate set of interrupts for 'trap' conditions, like addressing faults and math errors.
  • The PIC18 "PORTB change on interrupt" capability has been replaced by a more generic "change notification" interrupt system in which most parallel port pins have associated change notification interrupt hardware with events generated on any pin change. Each pin with a change notification flag can be separately enabled or disabled, and these events are OR'ed together to form a single change notification interrupt.  The INTx interrupt system implemented on the PIC18 is also available on the PIC24.
  • Error trapping is easier, as now you can have a default ISR for any unhandled interrupts or trap conditions that can print out an error string identifying the interrupt source (PIC24H); this can be a life-saver in helping students identify problems.
  • In 2007, Microchip released some powerful 28-pin DIP PIC24H and PIC24F processors, previously all of their PIC24 offerings had been surface mount only. This allowed us to prototype on breadboards like we had been doing. They have continued this trend and have some very powerful PIC24 family members available in 28-pin DIP packages. The only drawback is that they do not offer any 40 pin DIP packages.
  • The PIC24 compiler is based on the GCC compiler, so it is a good compiler from both a code generation viewpoint (the PIC24 compiler generates really tight code) and from a feature viewpoint (everything in modern C compilers is supported). The PIC24 compiler does not seem to have eccentricities like the MCC18 compiler (such as its default behavior of not promoting 8-bit values to 16-bit values in mixed 16/8-bit calculations, which can cause problems that are difficult to track down).
  • The PIC24 family has a rich set of on-chip peripherals (DMA, ECAN, comparator module, real-time clock calendar, etc.) and the peripherals that you are used to having from the PIC18 family have more advanced features. This made the PIC24 family more attractive  than the PIC18 family from a senior design perspective.
  • Parallel ports are more flexible, most PIO pins have individual pull-ups that can be enabled/disabled, as well as configurable open-collector operation.
  • The instruction cycle is now 2 cycles instead of 4 cycles, so you get a 2X speed up from that, and the 16-bit architecture gives you almost another 2X speedup. Plus the PIC24H family has a higher maximum clock speed than the PIC18 family. Configuring a PIC18 CPU for its fastest operation and comparing it against a PIC24H CPU at its fastest, there is about a 6X speedup with the PIC24H CPU. The PIC24F family is not as fast as the PIC24H family as it is aimed at lower-power applications, but it is still faster than the PIC18 family. 
  • The ADC module (10 or 12 bit conversions, signed/unsigned formats) is more much capable with separate sample/hold blocks that are user controllable, ability to automatically scan and convert several channels, and linkage to the DMA engine in devices that support DMA. You can still operate it in a simple conversion mode like what is available on the PIC18 family, but if has much more flexibility if you need it.
  • More flexible clocking options and power-saving modes, such as a doze capability that allows the CPU clock speed to be reduced without reducing peripheral clock speed, meaning that  a serial port still operates at the same baud rate.

There has to be some cons to using the PIC24 family, what are they?

  • No 40-pin DIP packages for either the PIC24H or PIC24F families as of November 08, it would nice to have these for senior design projects.
  • No PICSTART programmer support for PIC24H/F; you must use either the PICkit2 or ICD2 (or a third party) programmer for these devices. We use a small PCB that has a ZIF socket and 6-pin header for installing a serial bootloader on the PIC24 CPUs that our students use; then the serial bootloader is used for downloading programs.

What PIC24 processors do you use in the text?

The majority of the book exercises use a PIC24HJ32GP202 (a 28-pin DIP). Some of the advanced topics use the PIC24HJ64GP502 (a 28-pin DIP) which is pin compatible with the PIC24HJ32GP202 but offers more on-chip modules such as DMA, comparators, a real-time clock calendar, and ECAN. From the PIC24F family, we have used the PIC24FJ64GA002 (the PIC24F family has lower maximum clock speed, and is lower-power than the PIC24H family) which is also pin compatible with the PIC24HJ32GP202. All of the code examples can run without modifications on any of  these processors, if the processor has the on-chip module that supports the code example (for example, the comparator code example does not run on the PIC24HJ32GP202 because it does not have a comparator module).

Are the book examples compatible with the dsPIC30/dsPIC33 families? What is the difference between these processor families?

We have not tested the book examples with the dsPIC30 CPUs; as of September 2009 we made some changes for compatibility with dsPIC33 CPUs and have done some testing using 28-pin dsPIC33 devices like the dsPIC33FJ32GP202. The PIC24H/F CPUs execute a subset of the dsPIC30/dsPIC33 instruction set. The dsPIC30/dsPIC33 CPUs have an additional ALU (a DSP engine) that is optimized for high-throughput,  fixed-point operations, with specialized instructions that target this ALU.  The dsPIC33 family is a higher performance, enhanced version of the original dsPIC30 family. The PIC24 CPUs and dsPIC CPUs share most of the same on-chip modules. It should not be difficult to get the book's examples to work with the either the dsPIC30 or dsPIC33 families, we simply have not had the need to do this.  As an FYI, the dsPIC33 family is most similar to the PIC24H family in terms of peripherals and clocking.

I am using processor X in my course, why should I switch to the PIC24 family?

First of all, we believe that as long as students are given exposure to both assembly language and C along with a significant hands-on  hardware experience as undergraduates (and the earlier the better), then the processor choice is secondary.  All we can do is explain why we like the PIC24 family and Microchip
  • The PIC24 is a 16-bit processor with a rich instruction set architecture (ISA), featuring 16 general purpose registers (W0-W15) and support for both two operand and three operand instructions. The ISA has a full set of signed and unsigned branches, multiply and division support, a true data stack, and the expected set of addressing modes in a modern ISA. We teach the PIC24 in our introductory microprocessor course, and this is our students' first exposure to assembly language. The PIC24's modern instruction set makes for an easy transition for our students who take our follow-on Computer Architecture course that uses the Hennessy and Patterson textbook (Computer Organization and Design: The Hardware/Software Interface), which uses the MIPS instruction set architecture. We use the C language for the hardware interfacing portion of our introductory course. The C compiler provided by Microchip is the GCC compiler, which means that generated assembly code is good quality, and the compiler is full featured. Here is the Programmers Reference Manual that gives the instruction set for the PIC24H/PIC24F/dsPIC families (the PIC24H/PIC24F instruction set is a subset of the dsPIC instruction set, the only instructions not supported are those for the specialized fixed-point ALU that is included in dsPIC family).
  • Microchip makes it easy to provide a significant hands-on hardware experience by providing a free development environment (MPLAB), a free student edition of their PIC24 C compiler, and a rich set of PIC24 family members in 28-pin DIP packages that have up to 8K of SRAM and 128K of program memory. They also have a great sampling program that our students use to their advantage, and Microchip processors and other products are also readily available from third parties like Digi-key and Mouser, and also from Microchip Direct. There is also an inexpensive development tool called the PICKit2 ($25 with educational discount) for programming the flash memory of PIC24 processors.  All development tools run under Windows OS.
  • The on-chip peripherals supported by the PIC24 include everything you would expect in a modern microcontroller:  timers, ADC, SPI, I2C, UART, DMA, CAN, real-time clock, and a parallel master port. Other features include run-time self-programming, numerous clocking modes, a priority interrupt system, remappable peripheral pins, flexible I/O ports, and different power-saving modes. We cannot cover all of the features of the PIC24 in our first course, so we also use it as one of the processors discussed in our follow-on embedded systems course.


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